Semiconductor device testing method and system employing trace data

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 6617842
APP PUB NO 20010005132A1
SERIAL NO

09747727

Stats

ATTORNEY / AGENT: (SPONSORED)

Importance

Loading Importance Indicators... loading....

Abstract

See full text

A method and apparatus for generating a test pattern enabling the detection of malfunctions produced when a semiconductor device is loaded on actual equipment prior to marketing. Using a logical analyzer, signal waveform data collected during the period of signal malfunction is acquired. This signal waveform data is converted by a test pattern generating device into a test pattern for automatic testing equipment. This test pattern is used to change data at the time of malfunction into normal data to generate a pattern of expected values for an output signal of the semiconductor device. Then, it is determined whether the input signal setting required for an output signal of the semiconductor device is present in the signal waveform data. If not, a test pattern for setting the input signal is generated. If the malfunction is reproduced in the testing equipment, the test pattern is used as a mass production test.

Loading the Abstract Image... loading....

First Claim

See full text

Family

Loading Family data... loading....

Patent Owner(s)

Patent OwnerAddressTotal Patents
PS4 LUXCO S.A.R.L.LUXEMBOURG, LU167

International Classification(s)

  • [Classification Symbol]
  • [Patents Count]

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Nishikawa, Katsumi Tokyo, JP 12 99
Shibata, Kazuo Tokyo, JP 27 290

Cited Art Landscape

Patent Info (Count) # Cites Year
 
MICRON TECHNOLOGY, INC. (1)
* 6321353 Intelligent binning for electrically repairable semiconductor chips 9 2001
 
TEXAS INSTRUMENTS INCORPORATED (1)
* 5923836 Testing integrated circuit designs on a computer simulation using modified serialized scan patterns 18 1996
 
Thomson-CSF (1)
* 5010552 Device and method for the generation of test vectors and testing method for integrated circuits 13 1987
 
FUJITSU LIMITED (1)
* 5841960 Method of and apparartus for automatically generating test program 13 1995
* Cited By Examiner

Patent Citation Ranking

Forward Cite Landscape

Patent Info (Count) # Cites Year
 
POLARIS INNOVATIONS LIMITED (2)
* 7191085 Method for testing an electric circuit 0 2005
* 2006/0049,844 Method for testing an electric circuit 0 2005
 
ADVANCED MICRO DEVICES, INC. (1)
* 8725748 Method and system for storing and retrieving semiconductor tester information 0 2004
 
MACRONIX INTERNATIONAL CO., LTD. (4)
* 7969803 Method and apparatus for protection of non-volatile memory in presence of out-of-specification operating voltage 0 2009
* 2010/0149,893 METHOD AND APPARATUS FOR PROTECTION OF NON-VOLATILE MEMORY IN PRESENCE OF OUT-OF-SPECIFICATION OPERATING VOLTAGE 0 2009
8208323 Method and apparatus for protection of non-volatile memory in presence of out-of-specification operating voltage 0 2011
* 2011/0216,607 METHOD AND APPARATUS FOR PROTECTION OF NON-VOLATILE MEMORY IN PRESENCE OF OUT-OF-SPECIFICATION OPERATING VOLTAGE 0 2011
 
INTEL CORPORATION (1)
* 7203872 Cache based physical layer self test 5 2004
 
SAMSUNG ELECTRONICS CO., LTD. (4)
8145968 Method of determining binary signal of memory cell and apparatus thereof 0 2008
* 9229057 Pattern synthesis apparatus and semiconductor test system having the same 0 2012
* 2012/0326,738 PATTERN SYNTHESIS APPARATUS AND SEMICONDUCTOR TEST SYSTEM HAVING THE SAME 2 2012
9747998 Test method of semiconductor memory device and semiconductor memory system transferring fail address data from a volatile to a non-volatile memory array using an error-correction code engine 0 2014
 
RAMBUS INC. (1)
* 2004/0264,615 Margin test methods and circuits 20 2004
 
HYNIX SEMICONDUCTOR INC. (2)
* 6906970 Address counter strobe test mode device 5 2003
* 2004/0125,686 Address counter strobe test mode device 0 2003
 
ADVANTEST CORPORATION (1)
* 7356435 Semiconductor test apparatus and control method therefor 4 2005
* Cited By Examiner