Scalable switch matrix and demodulator bank architecture for a satellite uplink receiver
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United States of America Patent
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Mar 25, 2003
Issued Date -
N/A
app pub date -
Dec 7, 2000
filing date -
Aug 5, 1999
priority date (Note) -
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Abstract
A scalable switch matrix and demodulator bank architecture for a satellite payload processor wherein the demodulators are connected to the output ports of the switches as the data load on the uplink beams varies. The switch matrix includes a first switch layer for receiving the uplink transmission beams and a plurality of demodulators connected to the output parts of the first switch layer. The number of demodulators is limited by the number of active uplink sub-bands which is generally less than the number of sub-bands per beam times the number of transmission beams. Thus, only a relatively few number of demodulators are distributed among the uplink transmission beams as required. This results in a readily scalable architecture having higher demodulation utilization rates than dedicated demodulation architectures.
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