Importance

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Abstract

A semiconductor structure including a silicon wafer having silicon regions, and at least one Ge.sub.xSi.sub.1-x region integrated within the silicon regions. The silicon and Ge.sub.xSi.sub.1-x regions can be substantially coplanar surfaces. The structure can include at least one electronic device configured in the silicon regions, and at least one electronic device of III-V materials configured in said at least one Ge.sub.xSi.sub.1-x region. The structure can be, for example, an integrated HI-V/Si semiconductor microchip. In accordance with another embodiment of the invention there is provided a method of fabricating a semiconductor structure, including providing a silicon wafer with a surface; forming a pattern of vias within the surface of the wafer; and depositing regions of Ge.sub.xSi.sub.1-x within vias. The method can include the step of processing the wafer so that the wafer and Ge.sub.xSi.sub.1-x regions have substantially coplanar surfaces. Another embodiment provides a method of fabricating a semiconductor structure, including providing a silicon wafer with a surface; depositing regions of Ge.sub.xSi.sub.1-x to the surface of the silicon wafer; and depositing silicon to the surface such that the deposited Ge.sub.xSi.sub.1-x regions are integrated within silicon.

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First Claim