Simulation of data processing apparatus
Number of patents in Portfolio can not be more than 2000
United States of America Patent
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Feb 8, 2005
Grant Date -
Jul 26, 2001
app pub date -
Dec 20, 2000
filing date -
Jan 20, 2000
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A software simulation technique for pipelined hardware is provided in which the hardware is modelled as a plurality of pipelined circuit element models that each respectively read their input data values from a first data storage area A and write their output data values to a second data storage area B. At the end of each simulated clock signal cycle, the first data storage area A and the second data storage area B are swapped to effectively replicate the behavior of the passing of signal values between pipelined stages in a hardware pipeline.
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