Pattern generation circuit, multi-path detection circuit employing the same and multi-path detection method
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United States of America Patent
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-
Feb 7, 2006
Grant Date -
Aug 2, 2001
app pub date -
Jan 29, 2001
filing date -
Feb 2, 2000
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A multi-path detection circuit can improve path detection accuracy in the environment where the path is located close in the extent of one chip in the multi-path detection circuit of CDMA type receiver unit. The multi-path detection circuit has generating means for generating a logic pattern of a correlated peak in the delay profile, and removing means for removing a power component of the detected correlated peak from the delay profile using the logical pattern of the correlated peak generated by the generating means.
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