Dynamic memory clock control system and method
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United States of America Patent
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Oct 1, 2002
Grant Date -
Aug 2, 2001
app pub date -
Aug 7, 1998
filing date -
Aug 7, 1998
priority date (Note) -
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Abstract
A memory clock control system and method facilitates power reduction on a dynamic basis by detecting memory access request loading from a number of memory access devices, such as video and graphics engines. Based on the detected memory access requirements, the system and method adaptively varies a memory clock frequency in response to determining the desired memory usage at a given point in time. The memory clock is varied based on the priority of a given memory access engine, such that the clock is kept or increased to a higher rate for high priority engines such as real-time processing engines to facilitate high performance video capture.
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