SYSTEM AND PROCESS FOR HIGH SPEED INTERFACE CLOCK SKEW CORRECTION
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United States of America Patent
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N/A
Issued Date -
Aug 16, 2001
app pub date -
Jul 7, 1999
filing date -
Jul 7, 1999
priority date (Note) -
Abandoned
status (Latency Note)
Importance
Abstract
A receiving system for aligning a first signal to a reference signal is disclosed. In the receiving system, a selectable delay receives a first signal and delays the first signal by a selectable amount to generate a delayed first signal. A phase detector receives the delayed first signal and a reference signal and generates phase information which represents a phase difference between the delayed first signal and the reference signal. A phase accumulator receives and accumulates the phase information and generates delay select information which represents an accumulated phase difference between the delayed first signal and the reference signal. The selectable delay receives the delay select information and delays the first signal based on the delay select information, resulting in improved alignment of the delayed first signal and the reference signal. The receiving system may also include a second delay for receiving a second signal and delaying it by a fixed amount to generate the reference signal.
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