Method of forming a composite interpoly gate dielectric

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United States of America Patent

PATENT NO 6413820
APP PUB NO 20010015456A1
SERIAL NO

09725843

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Abstract

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The as-deposited thickness of at least one of the oxide layers of a composite ONO dielectric film between a floating gate and a control gate of a non-volatile semiconductor device is deposited to a sufficient thickness such that, after the top oxide layer is cleaned, the control gate is spaced apart from the floating gate a distance corresponding to at least a minimum design data retention. Deposition is facilitated by forming one or more oxide layers at a thickness greater than the design rule by employing a relatively high dielectric constant material for the oxide layer or layers, such as aluminum oxide, titanium oxide or tantalum oxide. In this way, the capacitance of the ONO film between the floating gate and the control gate is maintained per design rule, avoiding a change in operating voltage. Embodiments include depositing a relatively thick top oxide layer to enable thorough cleaning without adversely reducing the total thickness of the ONO stack and, hence, achieving design data retention.

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Patent Owner(s)

  • MONTEREY RESEARCH, LLC

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Bui, Nguyen Duc San Jose, CA 14 254

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