Method of making wafer level chip scale package

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 6420244
APP PUB NO 20010016400A1
SERIAL NO

09785329

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Abstract

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A method for fabricating the wafer level chip scale package (WLCSP) is developed. This method mainly comprises the steps of: disposing a wafer on the top surface of a retractable film, the wafer having a plurality of chips and a plurality of cutting lines therebetween, each chip having a plurality of bonding pads; cutting the wafer into individual chips along the cutting lines; stretching the retractable film so as to separate the cut chips from one another with a predetermined distance; molding the cut wafer in order to encapsulate the bonding pads and sides of each chip completely; grinding the encapsulated chip to expose the bonding pads out of the molding compound; and sawing the encapsulated chips into individual semiconductor package unit.

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Patent Owner(s)

  • ADVANCED SEMICONDUCTOR ENGINEERING, INC.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Lee, Chun-Chi Kaohsiung, TW 72 673

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