Deep trace memory system for a protocol analyzer
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United States of America Patent
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May 21, 2002
Grant Date -
Aug 23, 2001
app pub date -
May 3, 2001
filing date -
Nov 17, 1997
priority date (Note) -
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status (Latency Note)
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Abstract
A deep trace buffer management system for a protocol analyzer includes a hardware search engine that locates specified data patterns within the trace buffer as directed by a host processor. The protocol analyzer is preferably connected to a laptop computer that serves as the host processor, and the protocol analyzer preferably is housed in a portable chassis separate from the host processor and has a host port to connect to the host processor through a relatively small bandwidth port. An interface port connects the protocol analyzer to the communication interface under analysis. Logic circuitry controls selective read and write operations of traces to and from the trace buffer in response to parameters as directed by the host processor.
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