Changing the output frequency of a phase-locked loop
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United States of America Patent
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Jan 13, 2004
Grant Date -
Aug 30, 2001
app pub date -
Dec 12, 2000
filing date -
Dec 13, 1999
priority date (Note) -
Expired
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Abstract
A phase-locked loop (PLL) 1 is provided with means for changing the frequency of the output signal to a desired frequency. The PLL 1 is operated during a first period with a feedback frequency division ratio set to an initial value N' which controls the conduction time of the charge pumps during a first period having a predetermined length to place an amount of charge on the loop filter 6 during the first period sufficient to produce a control voltage for controlling the voltage-controlled oscillator 10 to output an output signal substantially at the desired output frequency. At the end of the first period, the feedback loop 11 is opened by disabling the charge pump 5 for a second period to allow the control voltage output from the loop filter 6 to settle. Subsequently the feedback loop 6 is closed and the feedback frequency division ratio is set to a proper value N.sub.2 such that operation of the PLL 1 subsequent to the second period locks the output frequency to the desired frequency. The proper and initial values are stored in a main register 31 and a shadow register 32, respectively, which are switched in response to an S counter 36 counting predetermined numbers of comparison periods defining the first and second periods.
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Patent Owner(s)
| Patent Owner | Address | |
|---|---|---|
| SONY UNITED KINGDOM LIMITED | THE HEIGHTS BROOKLANDS WEYBRIDGE KT13 OXW |
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Inventor(s)
| Inventor Name | Address | # of filed Patents | Total Citations |
|---|---|---|---|
| Harpham, Simon | Southampton, GB | 2 | 23 |
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| Surcharge after expiration - Late payment is unavoidable | $700.00 | $350.00 | $175.00 |
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