Stacked gate electrode for a MOS transistor of a semiconductor device

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United States of America Patent

PATENT NO 6750503
APP PUB NO 20010030342A1
SERIAL NO

09829969

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Abstract

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A semiconductor device with an MOS transistor gate electrode in a stacked structure comprising a silicon layer, a metal silicide layer, a reaction barrier layer such as a metal nitride layer and a metallic layer formed from the bottom upwards has an increased circuit performance owing to a gate resistance-reducing effect.

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Patent Owner(s)

  • RENESAS ELECTRONICS CORPORATION

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Ohnishi, Kazuhiro Kodaira, JP 19 288
Yamamoto, Naoki Kawaguchi, JP 367 4022

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