Method and apparatus for providing intelligent power management
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United States of America Patent
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Feb 18, 2003
Issued Date -
N/A
app pub date -
Jul 27, 2001
filing date -
Nov 4, 1998
priority date (Note) -
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Abstract
The present invention is an apparatus and method for providing power management apparatus for a circuit in a processor-based system. The apparatus comprises a memory to store instruction sequences by which the processor-based system is processed and a processor coupled to the memory. The stored instruction sequences cause the processor to: (a) determine a system access time of the circuit; (b) determine if the system access time is less than a first predetermined value, if so, increasing an accessibility period of the circuit, during which the circuit is active. Various embodiments are described.
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