Insulated channel field effect transistor with an electric field terminal region
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United States of America Patent
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May 11, 2004
Grant Date -
Jan 31, 2002
app pub date -
Oct 2, 1998
filing date -
Oct 2, 1998
priority date (Note) -
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Abstract
In one embodiment, the invention includes a field effect transistor having a substrate, a source, and a drain. An electric field terminal region is lower than the source and drain and is in the substrate. A body is above the electric field terminal region between the source and drain. In another embodiment, the invention includes a field effect transistor having an insulator layer and a body above the insulator layer between a source and a drain. A substrate is below the insulator layer. A gate is above the body and between the source and drain. An electric field terminal region is included in the substrate. The body may be undoped and the threshold voltage be set by setting the distance between the insulator layer and a gate insulator. The body, substrate, and electric field terminal region may float or one or more of them may be biased.
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