METHOD OF IMPROVING THE RELIABILITY OF GATE OXIDE LAYER

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United States of America Patent

APP PUB NO 20020013031A1
SERIAL NO

09246491

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Abstract

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A method of improving the reliability of a gate oxide layer. A substrate has a gate formed thereon and a dielectric layer is formed on the substrate. Metal interconnects are formed on the dielectric layer. A liner insulated layer is formed by LPCVD, APCVD or PECVD, for example, to cover the dielectric layer and the interconnects. An inter-metal dielectric layer is formed on the liner insulated layer by HDPCVD.

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Patent Owner(s)

Patent OwnerAddress
UNITED MICROELECTRONICS CORPHSIN-CHU CITY

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
CHEN, KUEN-JIAN HSINCHU HSIEN, TW 6 347
LU, HORNG-BOR HSINCHU, TW 29 322

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