US Patent Application No: 2002/0017,920

Number of patents in Portfolio can not be more than 2000

Low voltage differential dual receiver

ALSO PUBLISHED AS: 6480022

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Abstract

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A low-voltage differential dual receiver for a SCSI bus uses a symmetrical driver by doing without a termination bias voltage. The data phase and protocol phase of SCSI communication are separated by using two receivers and optimizing each receiver for its particular function. A high-speed receiver is used when transmitting data at high-speeds, and a lower performance, low-speed receiver is used for other SCSI phases. A built-in offset allows the low-speed receiver to operate correctly during bus arbitration. The built-in offset in the low-speed receiver takes the place of the termination bias voltage in a traditional SCSI bus and is implemented in a variety of ways. In a first embodiment, an N-well generation circuit produces a bulk voltage for one transistor of the differential transistor pair that is different than a supply voltage supplied to the bulk of the other transistor. In a second embodiment, each of the transistors of the pair is implanted with a different dosage to change the threshold voltage for each. In a third embodiment, resistors of different sizes are attached to the source of each transistor in the pair in order to produce a different voltage at each source. In a fourth embodiment, two replica comparators are used to monitor an offset voltage of the differential receiver and to send control signals to an adjustable current source. The current source is adjusted by having an up-down counter switch on and off various legs of the current source.

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Patent Owner(s)

Patent OwnerAddressTotal Patents
ADAPTEC, INC.MILPITAS, CA247
RPX CORPORATIONSAN FRANCISCO, CA1917

International Classification(s)

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Bridgewater, Walter Francis Jr - 1 9

Patent Citation Ranking

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Patent Info (Count) # Cites Year
 
INTEL CORPORATION (5)
7,200,186 Methods and apparatus for reducing power usage of a transmitter and receiver coupled via a differential serial data link 7 2002
7,170,949 Methods and apparatus for signaling on a differential link 0 2002
7,287,126 Methods and apparatus for maintaining cache coherency 7 2003
7,496,149 Methods and apparatus for signaling on a differential link 0 2006
7,394,863 Methods and apparatus for signaling on a differential link 1 2006
 
AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD. (2)
8,234,422 Interfaces, circuits, and methods for communicating with a double data rate memory device 0 2009
8,279,697 Circuits and methods for reducing noise in the power supply of circuits coupled to a bidirectional bus 0 2011
 
BROADCOM CORPORATION (1)
7,161,781 Signal driving system 0 2003
 
INFINEON TECHNOLOGIES AG (1)
7,821,319 Switching apparatus and method for detecting an operating state 1 2007