Electronic control apparatus with memory validation and method
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United States of America Patent
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Dec 17, 2002
Grant Date -
May 9, 2002
app pub date -
May 10, 1999
filing date -
May 10, 1999
priority date (Note) -
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Abstract
A method and apparatus for confirming the operation of memory (212) operates during periods when the memory is not operating in a standard execution mode. This strategy allows the memory to be checked real-time without impacting normal bandwidth of an associated CPU (200). The method and apparatus guarantees deterministic testing by including circuitry and steps which force bus mastership and, therefore, memory access if the memory is busy for too long a period of time.
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