SYNCHRONOUS SEMICONDUCTOR DEVICE AND METHOD FOR LATCHING INPUT SIGNALS

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United States of America Patent

APP PUB NO 20020060945A1
SERIAL NO

09832851

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Abstract

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A compact synchronous semiconductor device having an improved set-up/hold time is disclosed. A decoder receives input signals and generates decoded signals. A delay-adjusting unit adjusts the delay time of each of the decoded signals and provides adjusted decoded signals. A latch circuit unit latches the adjusted decoded signals in synchronism with a clock signal.

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Patent Owner(s)

Patent OwnerAddress
SOCIONEXT INCYOKOHAMA-SHI KANAGAWA 222-0033

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Ikeda, Shinichiro Kasugai-shi, JP 12 153

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