Scheduling the dispatch of cells in multistage switches

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United States of America Patent

PATENT NO 7173931
SERIAL NO

09851461

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A multiple phase cell dispatch scheme, in which each phase uses a simple and fair (e.g., round robin) arbitration methods, is described. VOQs of an input module and outgoing links of the input module are matched in a first phase. An outgoing link of an input module is matched with an outgoing link of a central module in a second phase. The arbiters become desynchronized under stable conditions which contributes to the switch's high throughput characteristic. Using this dispatch scheme, a scalable multiple-stage switch able to operate at high throughput, without needing to resort to speeding up the switching fabric and without needing to use buffers in the second stage, is possible. The cost of speed-up and the cell out-of-sequence problems that may occur when buffers are used in the second stage are therefore avoided.

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Patent Owner(s)

  • POLYTECHNIC UNIVERSITY

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Chao, Hung-Hsiang Jonathan Holmdel, NJ 36 1611
Oki, Eiji Kodaira-shi, Tokyo 187-0003, JP 55 723

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