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Abstract

A system and method for multiplexing synchronous parallel digital data streams with different clock frequencies into a single data stream while preserving each data stream's timing integrity. A plurality of digital data inputs and corresponding clock inputs are coupled to corresponding FIFOs (First In First Out buffers), which are coupled to a data multiplexer (MUX). Each clock input is coupled to a clock MUX which couples to each FIFO and the data MUX. Finally, a transition state machine is coupled to the clock MUX, the data MUX, and the FIFOs. Each digital data input receives a data stream from a source, such as a digital video camera, while the corresponding clock input concurrently receives a corresponding clock signal. The transition state machine controls the selection of a data stream from the MUXed data streams and the selection of the corresponding clock signal from the MUXed clock signals. The transition state machine may receive a selection signal from an external source and transmit the selection signal to the data MUX and the clock MUX, as well as the FIFOs. Each clock input transmits its clock signal to the clock MUX which selects a clock signal based on the selection signal, and transmits the selected clock signal to the data MUX, the FIFOs, and the transition state machine. Each FIFO transmits its digital data stream to the data MUX which selects the data streams corresponding to the selected clock signal and outputs the selected stream, such as to an image acquisition device.

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