Configurable data processing device with bit reordering on inputs and outputs of configurable logic function blocks
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United States of America Patent
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Nov 30, 2010
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N/A
app pub date -
Dec 17, 2001
filing date -
Dec 20, 2000
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Abstract
A data processing device has a configurable functional unit for executing an instruction according to a configurable function. The configurable functional unit has a plurality of independent configurable logic blocks for performing programmable logic operations to implement the configurable function. Configurable connection circuits are provided between the configurable logic blocks and both the inputs and the outputs of the configurable functional unit. This allows an optimalization of the distribution of logic functions over the configurable logic blocks.
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