Side access layer for semiconductor chip or stack thereof
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United States of America Patent
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-
N/A
Issued Date -
Jul 25, 2002
app pub date -
Jan 24, 2001
filing date -
Jan 24, 2001
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
A method of forming a side access layer on a semiconductor chip, or especially a stack of semiconductor chips, is provided. A region of protective insulating material and one or more conductive pads are formed above a major surface of each chip substrate. Each conductive pad is located at least a certain height above the major surface of the substrate and at least a certain distance away from a side surface of the chip, with the region of protective material generally extending between each conductive pad and the major surface of the substrate. The insulating material thereby protects each conductive pad during subsequent etching of the side surface of each chip substrate. The edge of each conductive pad is then exposed, preferably by planarizing the side surface of the chip or stack. Also, a side interconnect layer may be formed on the side surface of the chip or stack to provide an electrical connection to each conductive pad.
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