Interconnection network for a field programmable gate array
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Feb 17, 2004
Grant Date -
Aug 22, 2002
app pub date -
Aug 3, 2001
filing date -
Aug 4, 2000
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
An interconnection network architecture which provides an interconnection network which is especially useful for FPGAs is described. Based upon Benes networks, the resulting network interconnect is rearrangeable so that routing between logic cell terminals is guaranteed. Upper limits on time delays for the network interconnect are defined and pipelining for high speed operation is easily implemented. The described network interconnect offers flexibility so that many design options are presented to best suit the desired application.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Advertisement
Advertisement
Advertisement
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully