Chip-scale packages stacked on folded interconnector for vertical assembly on substrates
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United States of America Patent
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N/A
Issued Date -
Aug 22, 2002
app pub date -
Jan 3, 2002
filing date -
Dec 28, 2000
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
A vertical stack of semiconductor devices is formed by folding a strip-like flexible interconnector assembled with integrated circuit chips, packages and/or passive components and attaching coupling members solderable to other parts (FIGS. I4A and I4B).
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