Apparatus and method to reduce interrupt latency in shared interrupt systems

Number of patents in Portfolio can not be more than 2000

United States of America Patent

APP PUB NO 20020116563A1
SERIAL NO

09735435

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Abstract

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Apparatus and a method for implementing prioritized interrupt handling of devices that assert interrupt requests on a shared interrupt request line. The method provides a scheme for handling interrupts in a computing apparatus having a plurality of devices that share a shared interrupt request line, such that interrupt servicing of a device among the plurality of devices that is selected to have a highest priority interrupts servicing of interrupt service routines for the other devices. Each device has a corresponding service routine that has a core service portion including instructions for servicing that device. In response to an assertion of a first interrupt request signal on the shared interrupt request line by one of the devices, the method determines the device that asserted the first interrupt request signal, and initiates execution of a core service portion of the service routine corresponding to the device determined to have asserted the first interrupt. In response to a subsequent assertion of an interrupt request signal by the highest priority device, execution of any currently executing service routine that corresponds to one of the other devices is interrupted. Conversely, a latter interrupt request from one of the other devices will not interrupt execution of the service routine corresponding to the highest priority device. By operating in this manner, the present invention reduces interrupt latencies for the highest priority device, and produces interrupt latencies that are more deterministic.

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Patent Owner(s)

Patent OwnerAddress
BSQUARE CORPORATION110 110TH AVENUE NORTHEAST SUITE 200 BELLEVUE WA 98004

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Lever, Paul D Edmonds, WA 2 80

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