Same tile method
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United States of America Patent
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Sep 28, 2004
Issued Date -
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app pub date -
Feb 28, 2002
filing date -
Feb 28, 2001
priority date (Note) -
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Abstract
A tile-oriented graphics processing system in which an additional level of caching is provided locally, at the output of a patch-processing graphics computation block. This additional local storage buffers the current tile, so that repeated accesses to the same tile can avoid pipelining delays connected with access to the main cache. (Even an on-chip cache, in a large chip, can impose access delays which are significant in relation to the computation speeds involved.)
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