Importance

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Abstract

The present invention is directed toward methods and apparatus for scheduling packet transmission based on anticipated arrival times of the data packets. Arrival times for data packets may be determined relative to a system clock value. Because the system clock is expressed by a finite number of bits, the clock rolls over to all zeros after it reaches its maximum value. Thus, some of the arrival times may be anticipated to occur after the system clock recycles and a comparison of the magnitude of arrival times would not always indicate which is earlier in time. Since packets are limited in length, however, the range of arrival times is bounded. By determining whether the difference between arrival times exceeds the maximum range of arrival times, it can be determined that the result of a comparison of magnitudes yields a wrong result. By knowing that the result is wrong, it can then be reversed to correctly indicate which arrival time occurs first.

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First Claim