Data processing device with memory coupling unit
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United States of America Patent
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Issued Date -
Sep 12, 2002
app pub date -
May 8, 2002
filing date -
Nov 13, 1998
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
A data processing unit is disclosed with a register file having a plurality of registers. A memory having a plurality of n-bit input/output ports, and a coupling unit for coupling the memory with the register file, a memory address and select unit for addressing the memory banks are provided. The coupling unit comprises a bus having a bus width of at least 2n-bits forming at least a first and second sub-bus, first couplers for coupling each memory bank or the register file selectively with one of the sub-busses, and second couplers for coupling the register file or the memory banks with the bus.
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