Selective expansion of high-level design language macros for automated design modification

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United States of America Patent

APP PUB NO 20020129341A1
SERIAL NO

09753279

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A method and apparatus are described for selective expansion of HDL macros for automated design modification. According to one embodiment of the present invention, the selective expansion of HDL macros allows for insertion of scan cells for selected signals into HDL design files comprising a hardware design while making the modified file look as much as possible like the designer's original HDL file by using an 'as if' approach to parsing HDL design macros, using multifaceted parser tokens, and using a three-tiered token list. In order to make the modified file look as much as possible like the designer's original HDL file all text except the required changes are preserved from the original file. To accomplish this, the parsing program used by the HDL scan insertion tool creates lists of tokens that record everything including spaces, tabs, and comments. Then to perform the modifications to the HDL, the token lists, representing 'lines' from the HDL file, are modified before they are written back out as the updated scan inserted HDL file.

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Patent Owner(s)

Patent OwnerAddress
INTEL CORPORATION2200 MISSION COLLEGE BLVD SANTA CLARA CA 95054

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Hibdon, Gregory Folsom, CA 1 10

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