Method and apparatus for integrated circuit debugging
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United States of America Patent
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N/A
Issued Date -
Sep 19, 2002
app pub date -
Feb 20, 2002
filing date -
Feb 24, 2001
priority date (Note) -
Abandoned
status (Latency Note)
Importance
Abstract
Method and apparatus for integrated circuit debugging. Three debug access methods into an integrated circuit are provided to control the testing and debugging of program code, functional blocks and circuitry therein. The debug access includes a serial access, an I/O mapped parallel access, and a direct parallel access. The three debug accesses have varying levels of intrusiveness and test/debug efficiency. Depending upon whether the integrated circuit is unpackaged, packaged, coupled to a printed circuit board or found within a system, any one or more of the three debug accesses to debugging the integrated circuit can be utilized.
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