Implementing a finite state machine using concurrent finite state machines with delayed communications and no shared control signals

United States of America Patent

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Issued Date
Oct 3, 2002
app pub date
Apr 2, 2001
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Apr 2, 2001

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Abandoned

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Abstract

The present invention comprises a method of implementing state machines between regions in which there are communication delays between the regions.

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Patent Owner	Address
INTEL CORPORATION	2200 MISSION COLLEGE BOULEVARD SANTA CLARA CA 95054

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G06F:ELECTRIC DIGITAL DATA PROCESSING

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Inventor Name	Address	# of filed Patents	Total Citations
Drusinsky, Doron	Cupertino, CA	5	101

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Implementing a finite state machine using concurrent finite state machines with delayed communications and no shared control signals

Number of patents in Portfolio can not be more than 2000

United States of America Patent

09825138

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09825138

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