Self-timed activation logic for memory
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United States of America Patent
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-
Sep 9, 2003
Grant Date -
Oct 10, 2002
app pub date -
Jan 14, 2002
filing date -
Feb 23, 2001
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A self timed logic circuit is used to generate a self timed memory clock to access data in a memory. The self timed memory clock has a periodic pulse which enables circuitry in the memory for a brief period of time over its pulse width. The amount of charge and voltage change, required on bit lines for resolving a bit of data stored in a memory cell during the pulse width of the self timed memory clock, is reduced by using a sensitive sense amplifier so that power can be conserved.
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