Discrete time sequence model for slotted and synchronous switching of optical burst signals
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United States of America Patent
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Issued Date -
Oct 24, 2002
app pub date -
Feb 26, 2001
filing date -
Dec 22, 2000
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
A network (4) includes optical routers (19), which route information in fibers (10). Each fiber carries a plurality of data channels (16), carrying data in data bursts (28) and a control channel, carrying control information in burst header packets (32). A burst header packet includes routing information for an associated data burst (28) and precedes its associated data burst. Information on the data channels and control channel is organized in synchronized slots. Multiple burst header packets occupy portions of a slot, referred to as micro-slots. When the burst header packets are received, an egress processor (52) schedules the routing of their associated bursts. The egress processor (52) determines a time at which a data burst can be scheduled for passing through an optical matrix (40) to the desired output channel group (the burst can be delayed via fiber delay lines (46) if necessary).
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