Method for improving timing behavior in a hardware logic emulation system
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
N/A
Issued Date -
Nov 28, 2002
app pub date -
May 25, 2001
filing date -
May 25, 2001
priority date (Note) -
Abandoned
status (Latency Note)
Importance
Abstract
A method and apparatus for shortening the time to emulation and user-friendliness of a hardware emulation system is disclosed that places adjustable delay elements at the inputs to each flip-flop in a design after the user's design has been compiled. The user selects the amount of delay to be programmed into the adjustable delay element.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Advertisement
Advertisement
Advertisement
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully