Method and apparatus for evaluating an integrated circuit model
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United States of America Patent
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N/A
Issued Date -
Jan 2, 2003
app pub date -
Jun 4, 2002
filing date -
Jun 4, 2001
priority date (Note) -
Abandoned
status (Latency Note)
Importance
Abstract
A system and method that enables a user to design and use an Integrated Circuit (IC) simulation model without having access to confidential information contained within the model. In one embodiment the system includes a secure section where confidential simulation model information is contained and accessed. The user does not have access to this secure section. The user is provided access to the system via a user-interaction section, which provides controlled access to the IC model. The user can then establish and initiate simulations of the IC model, selecting test stimulus associated with the cores used within the IC model.
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