Signal processing device accessible as memory
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United States of America Patent
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N/A
Issued Date -
Jan 2, 2003
app pub date -
Sep 5, 2002
filing date -
Dec 17, 1996
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
A signal processing device is provided by connecting information processing units to each other using communication links and connecting the information processing units to each other and a host processor using an external bus. Parallel and pipe-line processing is accommodated by communication between the information processing units via the communication links and respective storage units of the information processing units and also by communication between the host processor and the information processing units via the external bus and the respective storage units. The host processor can communicate with the information processing units via the external bus through the respective storage units, the storage units being accessible as memory by the host processor. If each information processing unit is implemented on a single chip as an integrated circuit, the signal processing device can be incorporated in a computer in the same manner as conventional memory device are incorporated.
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