Multipler unit in reconfigurable chip
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United States of America Patent
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N/A
Issued Date -
Mar 20, 2003
app pub date -
Sep 18, 2001
filing date -
Sep 18, 2001
priority date (Note) -
Abandoned
status (Latency Note)
Importance
Abstract
A multiplication block for a reconfigurable chip includes multiple multiplication units and a group of the selectable adder units operably interconnectable with the multiplication units. The adder units can be selectively connected for different configurations. The multiplication block is preferably controlled by an instruction which can put the multiplication block into different configurations.
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Cited Art Landscape
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