Importance

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Abstract

An architecture for providing high-speed access over frequency-division multiplexed (FDM) channels allows transmission of ethernet frames and/or other data across a cable transmission network or other form of FDM transport. The architecture involves downstream and upstream FDM multiplexing techniques to allow contemporaneous, parallel communications across a plurality of frequency channels. Furthermore, a clock carried in downstream packets is used to provide network clocking to the remote devices. With accurate delivery of network stratum clocking, the architecture supports circuit emulation service to provide N.times.56/N.times.64 interfaces to customer premises equipment. The downstream packets carrying network clocking may utilize the MPEG packet format, and the clock may be an MPEG program clock reference (PCR). Unlike the common use of the MPEG program clock reference for synchronizing data flowing in the same direction as the clock information, the use of the MPEG program clock reference also is used for synchronizing data flowing an opposite direction to the clock information. Furthermore, the clocking information is used to accurately align the frequency channel usage of the remote or client devices. Because a plurality of client or remote devices may use frequency-division multiplexing, an accurate frequency reference from a network clock helps to ensure that the transmissions of the plurality of client devices do not overlap in frequency.

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First Claim