SRAM based cache for DRAM routing table lookups
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United States of America Patent
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Oct 23, 2007
Grant Date -
May 8, 2003
app pub date -
Nov 2, 2001
filing date -
Nov 2, 2001
priority date (Note) -
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Abstract
A router (101) includes one or more input ports (104) and one or more output ports (112). The router (101) includes a lookup table (105) to determine routing of the incoming packets or cells. The lookup table is implemented in dynamic random access memory (DRAM) with a portion implemented as static random access memory (SRAM) (202, 204). The SRAM (204) is used to store a first search level of destination addresses. Once the first search level in SRAM (204) has been exhausted, the search moves to the DRAM portion (202).
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