Method for increasing peripheral component interconnect (PCI) bus thoughput via a bridge for memory read transfers via dynamic variable prefetch
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United States of America Patent
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N/A
Issued Date -
May 15, 2003
app pub date -
Nov 9, 2001
filing date -
Nov 9, 2001
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
The invention provides a high speed PCI-to-PCI bridge structure and method of use thereof. One embodiment provides a first bus (240) adapted to facilitate data transfer, a second bus (215) adapted to facilitate data transfer, and a bridge (350) that couples the first bus to the second bus. The bridge is adapted to perform memory read, memory read line, and memory read multiple commands (from the first bus to the second bus). Advantageously, the bridge (350) responds to the memory read multiple command differently than either the memory read or the memory read line command.
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