Semiconductor device having ferroelectic memory cells and method of manufacturing the same
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United States of America Patent
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Jul 6, 2004
Issued Date -
N/A
app pub date -
Dec 17, 2002
filing date -
Mar 27, 2000
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A semiconductor device having ferroelectric memory cells has memory cell transistors each including first and second source/drain regions. Plug electrodes are formed in contact with the first and second source/drain regions, respectively. A ferroelectric capacitor is formed on the plug electrode connected to the first source/drain region. The ferroelectric capacitor includes a first lower electrode formed on the plug electrode, a ferroelectric film formed on the first lower electrode, and an upper electrode formed on the ferroelectric film. A second lower electrode is formed on the plug electrode connected to the second source/drain region. Wiring is formed to connect the upper electrode to the corresponding second lower electrode.
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