Emulation of memory clock enable pin and use of chip select for memory power control
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United States of America Patent
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N/A
Issued Date -
Jun 5, 2003
app pub date -
Nov 30, 2001
filing date -
Nov 30, 2001
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
A method and apparatus for powering down a memory device by deasserting a chip select line for a predetermined number of consecutive clock cycles and for powering up the memory device by asserting the chip select line.
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