Fibre channel arbitrated loop bufferless switch circuitry to increase bandwidth without significant increase in cost
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United States of America Patent
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N/A
Issued Date -
N/A
app pub date -
Jan 21, 2003
filing date -
Jan 23, 1997
priority date (Note) -
Abandoned
status (Latency Note)
Importance
Abstract
A switch, switched architecture and process for transferring data through an FCAL switch is disclosed. The switch uses multiple switch control circuits each coupled to one FCAL network and all connected to a crossbar switch. The switch control circuits are coupled together by a protocol bus for coordination purposes. Local conversations can occur on each FCAL loop and crossing conversations through the switch can occur concurrently. The OPN primitive is used to establish the connection before any data is transferred thereby eliminating the need for buffer memory in the switch control circuits. The destination address of each OPN is used to address a lookup table in each switch control circuit to determine if the destination node is local. If not, the destination is looked up and a connection request made on the protocol bus. If the remote port is not busy, it sends a reply which causes both ports to establish a data path through the backplane crossbar switch.
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