General input/output architecture, protocol and related methods to support legacy interrupts

United States of America Patent

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Jun 12, 2007
Grant Date
Jun 19, 2003
app pub date
Aug 23, 2002
filing date
Aug 24, 2001

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An enhanced general input/output communication architecture, protocol and related methods are presented.

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INTEL CORPORATION

International Classification(s)

G06F:ELECTRIC DIGITAL DATA PROCESSING

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[Patents Count]

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Inventor Name	Address	# of filed Patents	Total Citations
Ajanovic, Jasmin	Portland, OR	94	2792
Campbell, Randolph L	Folsom, CA	14	495
Hall, Clifford D	Orangevale, CA	27	1324
Harriman, David	Portland, OR	63	1612
Pawlowski, Steve	Beaverton, OR	3	100
Sethi, Prashant	Folsom, CA	88	1541
Vargas, Jose A	Folsom, CA	27	524

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General input/output architecture, protocol and related methods to support legacy interrupts

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United States of America Patent

10227599

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PATENT NO	7231486
APP PUB NO	20030115380A1
SERIAL NO	10227599
DOCKET NO

US Family Size	Non-US Coverage
Patent Longevity	Forward Citations

DATE PUBLISHED	PUBLICATION/PATENT NO.	PUBLICATION TYPE
June 12, 2007	US,7231486,B2 US7231486B2	GRANTED PATENT AS SECOND PUBLICATION
June 19, 2003	US,20030115380,A1 US20030115380A1	FIRST PUBLISHED PATENT APPLICATION

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10227599

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