Method and user interface for debugging an electronic system
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United States of America Patent
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Nov 23, 2004
Grant Date -
Jul 10, 2003
app pub date -
Jul 31, 2002
filing date -
Nov 30, 1999
priority date (Note) -
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Abstract
Techniques and systems for analysis, diagnosis and debugging fabricated hardware designs at a Hardware Description Language (HDL) level are described. Although the hardware designs (which were designed in HDL) have been fabricated in integrated circuit products with limited input/output pins, the techniques and systems enable the hardware designs within the integrated circuit products to be comprehensively analyzed, diagnosed, and debugged at the HDL level at speed. The ability to debug hardware designs at the HDL level facilitates correction or adjustment of the HDL description of the hardware designs.
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