Semiconductor device having silicon-including metal wiring layer and its manufacturing method

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United States of America Patent

SERIAL NO

10281321

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Abstract

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In a semiconductor device, an insulating interlayer having a groove is formed on an insulating underlayer. A silicon-including metal layer including no metal silicide is buried in the groove. A metal diffusion barrier layer is formed on the silicon-including metal layer and the insulating interlayer.

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Patent Owner(s)

Patent OwnerAddress
NEC CORPORATION7-1 SHIBA 5-CHOME MINATO-KU TOKYO 1088001 JAPAN

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Ohto, Koichi Tokyo, JP 38 1155
Takewaki, Toshiyuki Tokyo, JP 62 502
Usami, Tatsuya Tokyo, JP 140 2074
Yamanishi, Nobuyuki Tokyo, JP 9 65

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