Method for making stacked integrated circuits (ICs) using prepackaged parts

Number of patents in Portfolio can not be more than 2000

United States of America Patent

APP PUB NO 20030221313A1
SERIAL NO

10339023

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A method of making a stacked assembly of integrated circuits (ICs) from prepackaged semiconductor chips is disclosed. The method involves the steps of first starting with a commercially available prepackaged semiconductor chip (e.g. a thin small outline package (TSOP)), that contains bare silicon die within an encapsulant and removing at least part of the encapsulant from the lateral sides to expose the wire bonds. More such prepackaged chips are modified and stacked upon one another. Metalization is performed on the stack to interconnect the layers. An additional embodiment discloses the use of lead frames to the stack of integrated circuits. Additional disclosure covers a method of stacking printed circuit boards (PCBs). A compact and low cost mini-computer is also disclosed that is made using methods of the present invention.

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Patent Owner(s)

Patent OwnerAddress
APROLASE DEVELOPMENT CO LLC2711 CENTERVILLE ROAD SUITE 400 WILMINGTON DE 19808

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Gann, Keith D Tustin, CA 12 178

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