Method and system for resistance to statiscal power analysis
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United States of America Patent
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Issued Date -
Feb 5, 2004
app pub date -
Jan 23, 2003
filing date -
Feb 18, 2000
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
New techniques for cracking sealed platforms have recently been discovered which observe power modulation during execution of a software encryption program on a computer processor. Particularly vulnerable to such simple power analysis and differential power analysis attacks are smart cards which employ Data Encryption Standard (DES) protection. The invention protects against such attacks by substantively altering the observable operation of the cryptographic algorithm while it is processing input data. The alterations are generated in a random way and may include average neutral execution, permuted execution or code padding of the cryptographic algorithm.
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