Integrated thin film capacitor/inductor/interconnect system and method

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United States of America Patent

PATENT NO 6890629
APP PUB NO 20040081811A1
SERIAL NO

10686128

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A system and method for the fabrication of high reliability capacitors (1011), inductors (1012), and multi-layer interconnects (1013) (including resistors (1014)) on various thin film hybrid substrate surfaces (0501) is disclosed. The disclosed method first employs a thin metal layer (0502) deposited and patterned on the substrate (0501). This thin patterned layer (0502) is used to provide both lower electrodes for capacitor structures (0603) and interconnects (0604) between upper electrode components. Next, a dielectric layer (0705) is deposited over the thin patterned layer (0502) and the dielectric layer (0705) is patterned to open contact holes (0806) to the thin patterned layer. The upper electrode layers (0907, 0908, 1009, 1010) are then deposited and patterned on top of the dielectric (0705).

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Patent Owner(s)

Patent OwnerAddress
ULTRASOURCE INC22 CLINTON DRIVE HOLLIS NH 03049

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Casper, Michael D 2 Carol Ann La., Amherst, NH 6 98
Mraz, William B 67 Bald Hill Rd., Newfield, NH 10 127

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