Method and apparatus for calibration of a vector network analyzer
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United States of America Patent
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Issued Date -
May 27, 2004
app pub date -
Nov 25, 2002
filing date -
Nov 25, 2002
priority date (Note) -
Abandoned
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Abstract
A method and apparatus for calibrating a vector network analyzer for use with a test system using a mathematical model of, for example, a slotted line. Voltage and displacement data sampled along the slotted line, used with the mathematical model, creates a plurality of equations which may be solved to generate a reflection coefficient which may be used as an impedance standard of known accuracy and used to calibrate a VNA thereby, without actual use of precision impedance standards.
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